fpga132
Zynq7000 Series

UltraScale+ Series

Category:

• Powered by: XCZU7EG / XCZU4EG / XCZU2EG

• Modular Design: offers flexible integration

• Compact Build: ideal for seamless embedment

• High Performance: combines FPGA + ARM + high-speed I/O for optimal efficiency

• Extensive IP Core Library: features a mature collection of FPGA IP cores

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Built on Xilinx Zynq UltraScale+ MPSoC FPGA technology of, Nexus incorporates a multi-core ARM Cortex processor, ample FPGA resources, and high-speed SerDes lanes. This versatile solution functions simultaneously as a controller, an algorithm accelerator, and a high-speed digital signal processor. SmartGiant also offers customization services to streamline customers’ hardware, logic, firmware, and software needs. We also provide ODM services covering R&D, validation, and mass production.

▶ Nexus-003-001 Hardware Block Diagram

▶ XCZU7EG FPGA SOC (ARM+FPGA) Architecture

The Zynq® UltraScale+™ MPSoC family is built on the Xilinx UltraScale™ MPSoC architecture. This product line integrates a powerful 64-bit quad-core/dual-core Arm® Cortex™-A53- and dual-core Arm® Cortex™-R5-based processing system (PS) and Zynq® UltraScale™ programmable logic (PL) in a single device. It also features on-chip memory, multi-port external memory interfaces, and an extensive set of peripheral connectivity interfaces.


▶ Application Scenarios

  • FPGA Controller
  • Digital Signal Processing
  • Algorithm Acceleration
  • Emulation & Prototyping
  • Data Center
  • Industrial & Vision
  • Healthcare & Sciences
  • Test & Measurement
  • Wired & Wireless Communications

▶ Controllers

Controller

FPGA Model & Parameter

Basic Specification

Nexus-001 -2EG

Xilinx Zyng UltraScale+ZU2EG, Quad-Core ARM,103K-Logic_Cell

2 GB DDR4, 16 GB eMMC, 1Gb Ethernet, USB 3.0 Type-CUART:

Nexus-002 -4EG

Xilinx Zyng UltraScale+ZU4EG, Quad-Core ARM,192K-Logic_Cell, 16 lane Serdes;

2 GB DDR4, 16 GB eMMC,1Gb Ethernet, USB 3.0 Type-CUART:

Nexus-003 -7EG

Xilinx Zyng UltraScale+ZU7EG, Quad-Core ARM, 504K-Logic_Cell;

2 GB DDR4, 16 GB eMMC,1Gb Ethernet, USB 3.0 Type-CUART

 

▶ Processing System (PS)

Feature

Description

APU (Application Processing Unit)

Quad ARM®Cortex™-A53

Frequency: 1.5 GHz

RPU (Real-Time Processing Unit)

Dual ARM® Cortex™-R5

Frequency: 600 MHz

L1 Cache

32 KB Level 1, 2-way set-associative instruction cache with parity (independent for each CPU)

L2 Cache

1 MB Level 2, 16-way set-associative data cache with ECC (shared between the CPUs)

On-Chip Memory

256 KB on-chip RAM (OCM) in PS with ECC

External Memory Interfaces

DDR4, DDR3, DDR3L, LPDDR3, LPDDR4

8-Channel DMA Controller

2 DMA controllers for every 8 channels

 

▶ Programmable Logic (PL)

  Nexus-003-001 Nexus-002-4EG Nexus-001-2EG
MPSoC XCZU7EG XCZU4EG XCZU2EG
Programmable Logic Cells 504 K 192 K 103 K
Flip-Flops 461 K 176 K 94 K
Look-Up Tables (LUTs) 230K 88 K 47 K
Total Block RAM 38 MB 18 MB 5.3 MB
Programmable DSP Slices 1728 728 240
PL SerDes 24-lane TX/RX, 16.3 Gbps 16-lane TX/RX, 16.3Gbps None

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